This invention relates to the fabrication of packages for electronic components.
Semiconductor chips are packaged in a variety of ways for mounting to printed circuit boards. When high reliability and performance are needed, the chip is typically mounted in a ceramic package which can be hermetically sealed. The chip and package then go through a variety of processing steps such as wire bonding of the chip and package contact pads, cleaning, and lid attachment.
With the growing attraction for surface mounting of packages on the circuit board, a new type of ceramic package has been introduced. This package includes conductive leads extending from the top surface of the package and extending downwardly along the borders of the ceramic. The leads are typically formed in a J-configuration so that the curved portion can be soldered to the surface of the circuit board.
While the leaded packages provide surface mount capability, a problem exists in assembly of the chip and package. That is, the leads can be bent and damaged if they are subject to a load during the fabrication sequence. Since a pattern of solder pads corresponding to the package leads is formed on the circuit board, proper lead orientation is important for mounting. Lead repair is costly and time consuming.
It is, therefore, an object of the invention to fabricate leaded packages in a way which avoids damage to the leads.